Evalbot’s sound chip error in documentation

Past three days I’m working on turning on the sound output on my Evalbot based on stellaris chip. It has a nice sound chip TLV320aic3107 that is controlled through I2C and fed with data through I2S. I must say that it takes a great deal of fiddling with registers of this little thingy to get it to output anything on the speaker through D class amp. The code I used to set all the values is below:

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void vInitAudioOut(void)
{
    arrayLength = sizeof(dataFile)/sizeof(dataFile[0]);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
    GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_7);
    GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_7,GPIO_PIN_7);
    SysCtlDelay(200);
    GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_7,0);
    SysCtlDelay(200);
    GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_7,GPIO_PIN_7);
    SysCtlDelay(200);
 
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
    GPIOPinConfigure(GPIO_PB6_I2S0TXSCK);
    GPIOPinConfigure(GPIO_PE4_I2S0TXWS);
    GPIOPinConfigure(GPIO_PE5_I2S0TXSD);
    GPIOPinConfigure(GPIO_PF1_I2S0TXMCLK);
    GPIOPinConfigure(GPIO_PD4_I2S0RXSD);
    GPIOPinTypeI2S(GPIO_PORTB_BASE, GPIO_PIN_6);
    GPIOPinTypeI2S(GPIO_PORTD_BASE, GPIO_PIN_4);
    GPIOPinTypeI2S(GPIO_PORTE_BASE, GPIO_PIN_4|GPIO_PIN_5);
    GPIOPinTypeI2S(GPIO_PORTF_BASE, GPIO_PIN_1);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_I2S0);
    //SysCtlPeripheralReset(SYSCTL_PERIPH_I2S0);
 
    UARTprintf("I2S: MCLK set to %d\n",SysCtlI2SMClkSet(0,12288000));
    I2SMasterClockSelect(I2S0_BASE, I2S_TX_MCLK_INT|I2S_RX_MCLK_INT);
    I2STxConfigSet(I2S0_BASE,I2S_CONFIG_FORMAT_I2S|I2S_CONFIG_MODE_COMPACT_16|I2S_CONFIG_SAMPLE_SIZE_16|I2S_CONFIG_WIRE_SIZE_32|I2S_CONFIG_CLK_MASTER|I2S_CONFIG_EMPTY_REPEAT);
    I2STxEnable(I2S0_BASE);
 
    //I2S Interrupt settings
    I2STxFIFOLimitSet(I2S0_BASE, 8);
    I2SIntEnable(I2S0_BASE,I2S_INT_TXREQ);
    I2SIntRegister(I2S0_BASE, I2S0_Interrupt_Handler);
 
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
    GPIOPinConfigure(GPIO_PB2_I2C0SCL);
    GPIOPinConfigure(GPIO_PB3_I2C0SDA);
    GPIOPinTypeI2C(GPIO_PORTB_BASE,GPIO_PIN_2|GPIO_PIN_3);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C0);
    SysCtlPeripheralReset(SYSCTL_PERIPH_I2C0);
    I2CMasterInitExpClk(I2C0_MASTER_BASE,SysCtlClockGet(),false);
 
    //Configure Bumper L switch as the input pin E1
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
    GPIOPinTypeGPIOInput(GPIO_PORTE_BASE, GPIO_PIN_1);
    //Configure LED2 as output
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
    GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_5);
 
    //Initialize IC for use with D-class amp, as in datasheet (non documented registers)
    TLVSetRegister(0x00, 0x0D);
    TLVSetRegister(0x0D, 0x0D);
    TLVSetRegister(0x08, 0x5C);
    TLVSetRegister(0x08, 0x5D);
    TLVSetRegister(0x08, 0x5C);
    TLVSetRegister(0x00, 0x00);
 
    //Initialize IC for D-class amp
    TLVSetRegister(101, 0b00000001); //CODEC CLOCKIN from CLKDIV_OUT
    TLVSetRegister(102, 0b00000010); //CLKDIV_CLKIN used MCLK, N=2
    //TLVSetRegister(94, 0b11011110); //power up dacs
    //TLVSetRegister(98, 0b10111000); //GPIO clock out
 
    TLVSetRegister(73, 0b11111000); //turn on d-class amp
    TLVSetRegister(70b00001010); //left channel to play left samples
    TLVSetRegister(37, 0b11000000); //turn on left dac and right dac
    TLVSetRegister(41, 0b01010000); //left dac to left line output, right dac to right line output
    TLVSetRegister(43, 0b01110000); //left dac not muted  gain on minus something
    TLVSetRegister(44, 0b00110000); //right dac not muted  gain 0 //on minus something
 
    TLVSetRegister(90b00110000); //audio word length 32b
 
    TLVSetRegister(82, 0b10000000); //route DAC_L1 to LEFT_LOP
    TLVSetRegister(85, 0b10000000); //route DAC_R1 to LEFT_LOP
    TLVSetRegister(86, 0b00001000); //LEFT_LOP unmute 0db gain
    TLVSetRegister(93, 0b00001000); //RIGHT_LOP unmute 0db gain
 
    UARTprintf("TLVreg 94: %x\n", TLVGetRegister(94));
    UARTprintf("TLVreg 86: %x\n", TLVGetRegister(86));
    UARTprintf("TLVreg 93: %x\n", TLVGetRegister(93));
    UARTprintf("TLVreg 82: %x\n", TLVGetRegister(82));
    UARTprintf("TLVreg 43: %x\n", TLVGetRegister(43));
    UARTprintf("TLVreg 44: %x\n", TLVGetRegister(44));
    UARTprintf("TLVreg 101: %x\n", TLVGetRegister(101));
    UARTprintf("TLVreg 73: %x\n", TLVGetRegister(73));
 
    UARTprintf("Size of data sample: %x\n", sizeof(unsigned int));
}

The problem is here:

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TLVSetRegister(86, 0b00001001); //LEFT_LOP unmute 0db gain
TLVSetRegister(93, 0b00001001); //RIGHT_LOP unmute 0db gain

According to datasheet the registers 86 and 93 ( Output Level Control Register) have D0 bit only readable and not writable.

Stellaris Register 86

If D0 = 0 then LOP is not fully powered up, if D0=1 then LOP is fully powered up. So if you won’t set a bit that is supposed only to be read then you get only a very faint quiet sound (the oscilloscope doesn’t show any wave even on 20mV range, but you can still barely hear it on the speaker). I would assume that it is just some crosstalk from the input of LOP to the output.

After correcting the bit to 1 the sound is great and loud. Success.

The sourcecode I use is here Ethernet_stellaris it is developed under CoIDE with CoOS realtime operating system.

 

Edit: I asked about the subject on the TI’s forum and I hope it’s ok if I put it here:

Posted by Converter Apps:

Yes, Sorry for the confusion. Register 86 and 93 on Page 0 should show bit D0 as R/W. This is the only way to turn on the Line Outputs.

Also for the Class D, be sure to include the initialization code shown on page 46 of the data sheet.

Also I asked about the funny initialization sequence that is in the datasheet (the one mentioned by Converter Apps) – what is it for and what does it do:

Posted by Converter Apps:

This code goes to page 14 to disable some features that were not released on the AIC3107. There are no user options and the exact sequence is needed to insure that the Class D operates as intended. Since there are no user options we don’t specify the details of these registers.

So at least I know I’m not making this issue up.

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